Job offer

Embedded SW Engineer

Hiring date: 10/10/2025
INTERA-GROUP merges Sensing & Control and NVISION to deliver IoT and AI R&D and real-time solutions for Energy, Health, and Computing.

October 2025

INTERA-GROUP was born from the merger of Sensing & Control and NVISION, two companies with extensive experience in the development and operation of innovative products, services and solutions in the areas of IoT, automation, artificial intelligence and data management. It is a dynamic company at the forefront of IoT research and development, dedicated to bringing innovative real-time monitoring and management solutions to market. We actively engage in cutting-edge national and international collaborative R&D initiatives spanning various domains, including Energy, Health, and Computing. 

We currently have an exciting opportunity for a technically capable experienced engineer. For the Embedded unit devoted to Edge Computing, we are looking for a profile with the knowledge to develop software layer based on RISC-V architecture and targeted to Artificial Intelligence applications in the Edge.  

This person will continuously engage with the HW team to participate on the HW/SW co-design of the architectures and will build efficient drivers to test and use the resulting AI accelerators. 

This person will also engage with the ML team to port AI/ML applications from the cloud and desktop to resource-constrained embedded devices. 

For the position, the candidate will be engaged in the following activities: 

  • Development and implementation of the RISC-V bare-metal, RTOS and Embedded Linux software layer architecture: interrupts/exceptions, firmware, drivers, application. 
  • Design and implementation of AI model compilation pipelines from high-level frameworks (TensorFlow, PyTorch, ONNX) to embedded targets and custom AI accelerators. 
  • Integration and customization of compiler frameworks such as LLVM, MLIR, TVM, Glow, or XLA for optimized AI deployment on RISC-V and other target architectures. 
  • Development of code generation backends, quantization, and optimization passes tailored to hardware constraints (memory footprint, latency, and power). 
  • Creation of internal tools for profiling, benchmarking, and performance analysis of AI inference on constrained devices. 
  • Contribution to the definition and maintenance of the software layer and runtime infrastructure enabling seamless integration between model and hardware. 

Skills:  

  • PhD/BS/MS in Engineering with emphasis in Embedded Software.  
  • Excellent written/verbal communication skills and strong teamwork/collaboration. 
  • Strong background in compiler technologies and toolchain development
  • Proficiency in C/C++
  • Good understanding of CPU or accelerator architectures (preferably RISC-V) and their instruction sets. 
  • Familiarity with LLVM/MLIR or similar compiler infrastructures. 
  • Ability to work collaboratively in cross-disciplinary environments (hardware, software, AI). 

Other desirable skills: 

  • Experience with AI model optimization and inference runtimes (TensorFlow Lite, ONNX, TFLM, etc.). 
  • Experience with GNU/LLVM toolchains, GDB, QEMU, or other hardware simulation environments for code validation and testing. 
  • Familiarity with open-source development tools and workflows (Linux, Git, CMake, CI/CD). 
  • Understanding of embedded operating systems (bare metal, RTOS, or Embedded Linux).  
  • Theoretical or practical knowledge of AI model deployment on resource-constrained systems
  • Experience with Python or automation, tooling, or integration workflows. 

INTERA-GROUP actively fosters an environment to facilitate and strengthen gender equality, diversity, and inclusion in selecting, hiring, remunerating and promoting its employees. The company also balances on-site and remote work according to personal and professional requirements. 

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