Job offer

HW Design Engineer

Hiring date: 03/01/2026
INTERA delivers IoT R&D and real-time solutions for energy, health, and computing through global collaborative projects.

January 2026 

HW Design Engineer 

INTERA is a company that brings R&D around IoT to the market, providing innovative real-time monitoring and management solutions, and being involved in state-of-the-art national and international collaborative R&D projects in areas such as Energy, Health, and Computing.  

We currently have an exciting opportunity for a technically capable experienced engineer. For the new R&D unit devoted to Edge Computing, we are looking for a profile with the knowledge to develop accelerators and co-processors based on RISC-V architecture and targeted to Artificial Intelligence applications in ultra-low-power devices. This person will focus on developing RTL netlist coding and implementation in FPGA, performing design-space exploration and taking care of the trade-off between resource usage, performance, and power consumption.  

For the position, the candidate will be engaged in the following activities: 

  • Development and implementation of generic HW accelerators. 
  • RTL Design, debugging and verification. 
  • Integration of HW accelerators (memory mapped and custom instructions) on RISC-V systems. 
  • RISC-V firmware/driver development (Embedded C) to test HW accelerators. 
  • FPGA prototyping with EDA tools and platforms such as Xilinx/Altera or similar. 

Skills:  

  • PhD/BS/MS in Engineering with emphasis in Digital Design.  
  • Advanced knowledge of at least one Hardware Description Language, preferably System Verilog. 
  • Experience with HW simulators and synthesis tools. 
  • Good knowledge of modern CPU architectures (preferably RISC-V) and micro-architectures. 
  • Knowledge on the RISC-V instruction set (base and extensions). 
  • Embedded C for driver and firmware development. 
  • Excellent written/verbal communication skills and strong teamwork/collaboration. 

Other desirable skills: 

  • Open-source development tools experience: Linux, GitHub, Makefiles, Python, etc. 
  • AI theoretical/practical knowledge. 
  • RTOS and Embedded Linux experience. 
  • Knowledge and experience working through the ASIC Digital Design Flow: specifications definition, RTL verification, synthesis, power estimation. 
  • UVM theoretical/practical knowledge. 

INTERA actively fosters an environment to facilitate and strengthen gender equality, diversity, and inclusion in selecting, hiring, remunerating and promoting its employees. The company also balances on-site and remote work according to personal and professional requirements. 

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