Job offer

HW Design Engineer ASIC flow

Hiring date: 07/09/2025
INTERA is hiring an IC Design Engineer to lead ASIC development and RTL design for ultra-low-power AI/DSP chips (RISC-V/ARM) within its Edge Computing unit.

September 2025

HW Design Engineer ASIC flow 

INTERA is a company that brings R&D around IoT to the market, providing innovative real-time monitoring and management solutions, and being involved in state-of-the-art national and international collaborative R&D projects in areas such as Energy, Health, and Computing.  

We currently have an exciting opportunity for a technically capable experienced engineer. For the IC Design unit devoted to Edge Computing, we are looking for a profile with the knowledge to push our RTL code through the ASIC process. The focus will be specification writing, revision, and validation of the SoC infrastructures to produce a final chip design. Additionally, RTL design will be required for the role. The accelerators and co-processors inside the SoC are based on RISC-V/ARM architectures and targeted to Digital Signal Processing and Artificial Intelligence applications in ultra-low-power devices.  

For the position, the candidate will be engaged in the following activities: 

  • Specification writing and coordination with the backend team for ASIC design. 
  • RTL Design, debugging and testbench verification (DSP and AI oriented). 
  • Integration of HW accelerators (memory mapped and custom instructions) on RISC-V systems. 
  • RISC-V firmware/driver development (Embedded C) to test HW accelerators and peripherals. 

Skills:  

  • PhD/BS/MS in Engineering with emphasis in Digital Design.  
  • Advanced knowledge of at least one Hardware Description Language, preferably System Verilog. 
  • Knowledge and experience working through the ASIC Digital Design Flow: specifications definition, RTL verification, synthesis, power estimation. 
  • Good knowledge of modern CPU architectures (preferably RISC-V) and micro-architectures. 
  • Embedded C for driver and firmware development. 
  • Excellent written/verbal communication skills and strong teamwork/collaboration. 

Other desirable skills: 

  • Open-source development tools experience: Linux, GitHub, Makefiles, Python, etc. 
  • FPGA prototyping with EDA tools and platforms such as Xilinx/Altera or similar. 
  • AI theoretical/practical knowledge. 
  • RTOS and Embedded Linux experience. 
  • UVM theoretical/practical knowledge. 

INTERA actively fosters an environment to facilitate and strengthen gender equality, diversity, and inclusion in selecting, hiring, remunerating and promoting its employees. The company also balances on-site and remote work according to personal and professional requirements. 

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